Event Details :
One Week Short Term Training Program on Xilinx Vivado Embedded Design and Cadence IC Design 2018, MIT Academy of Engineering, Pune, Maharashtra, 26-30th November 2018
We are pleased to inform you that a one week Short Term Training Programme on ‘Xilinx Vivado Embedded Design and Cadence IC Design’ in association with Entuple Technologies, Banglore and CoreEL Technologies (I) Pvt. Ltd., Bangalore is being organized by the School Of Electrical engineering MITAOE, Alandi during 26th to 30th November, 2018.The aim of the workshop is to provide hands on training to the participant on FPGA platform and Xilinx System Generator for various applications. The STTP also aims at providing Hands-on CMOS design, Simulation, Analysis, Monte Carlo Simulation, Layout, DRC, LVS, Parasitic Extraction, Post Layout simulation, design of Differential Amplifier including Spice simulation and analysis using Cadence® Virtuoso® Analog Design Environment and Mixed mode simulator.
Event Dates: 26-30th November 2018
- IET- ApprovedOne Week Short Term Training Program on“Xilinx Vivado Embedded Design and Cadence IC Design”Date: 26th to 30th November 2018Organized bySchool of Electrical Engg.MIT Academy of Engineering Alandi Pune, 411041.
Last Dates for Registration: 20/11/2018
- Rs. 1000/- (for Non IET Members)
- Free for IET members
Note: For further queries you can contact,
- Dr. Sakhare D.Y.Mobile No. 8149205941
- Mrs. Rudrawar S.K.Mobile No. 9421851242